Leakage-aware temperature-constrained real-time scheduling

Recommended for funding by National Science Foundation (NSF), $250,000,  2009 - 2012
Investigator: Dr. Gang Quan  (single PI)

This project is motivated by two recently emerged challenges in design of computer systems---the escalating temperature and the dramatically increased leakage power consumption in IC circuits---that threaten to handicap future generations of computing systems. The chip temperature increases rapidly with its fast growing power consumption. In the meantime, high chip temperature drastically increases the leakage power, which is becoming a major component in the overall power consumption in today’s sub-micron IC circuits. This positive feedback loop between temperature and leakage exacerbates not only the power/energy minimization problem but also the temperature-constrained design problem.  

This research seeks to address the temperature and power/energy consumption problem using real-time scheduling techniques, with a focus on the interplay between temperature and leakage power consumption. This project intends to study the system-level thermal models that can capture the temperature-leakage interdependency with high accuracy while remain simple enough for formal system level analysis, and also to develop and validate novel and effective real-time scheduling techniques under both single and multiple processor platforms.

This research has great societal impacts through its significant contribution in enabling the continuous evolution of computing systems. In addition, the system-level models and techniques developed in this project will not only benefit computer scientists and researchers but those from other disciplines and research domain as well. Furthermore, this project provides abundant research topics and learning opportunities for both undergraduate and graduate students, especially those from the under represented group.