LIST OF PUBLICATIONS IN E-DATES

**Copyrights reserved by organizations or institutions sponsoring conferences or journals **

JOURNALS

Year 2008

• J-8: Z. Luo, T. Eguia, Jeffrey Fan, S. Tan, X. Yu, "Localized pre-conditional relaxation for variational power/ground network analysis", submitted to IEEE Transactions on VLSI systems (TVLSI), 2008 (in review)

• J-7: W. Zhao, Jeffrey Fan, "Vector estimation approach in H.264 bandwidth based architectural analysis", submitted to Journal of Embedded Computing (JEC), 2008 (in review)
   

• J-6: Jeffrey Fan, N. Mi, S. Tan, W. Zhao, Y. Cai, X. Hong, “Variational reduced order modeling of interconnect circuits by spectral stochastic method", submitted to Journal of Analog Integrated Circuits and Signal Processing (AICSG), 2008 (in review)
   

• J-5: A. Mullaguru, H. Huang, X. Yuan, Jeffrey Fan, "Model order reduction via eigen decomposition analysis", to appear on International Journal of Modelling, Identification and Control (IJMIC), 2008 (pdf)
   

• J-4: N. Mi, Jeffrey Fan, S. Tan, Y. Cai, X. Hong, “Statistical analysis of on-chip power delivery networks considering lognormal leakage current variations with spatial correlation”, IEEE Transactions on Circuits and Systems (TCAS-1), Vol. 55, No. 7, pp 2064-2075, August 2008 (pdf)

Year 2007

• J-3: Jeffrey Fan, S. Tan, Y. Cai, X. Hong, “Partitioning-based decoupling capacitor budgeting via sequence of linear programming”, Integration, The VLSI Journal, Vol. 40, Issue 4, pp 516-524, July 2007 (pdf)

• J-2: J. Shi, Y. Cai, S. Tan, Jeffrey Fan, X. Hong, “Pattern based iterative method for extreme large power/ground analysis”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 26, No. 4, pp 680-692, April 2007 (pdf)

Year 2006

• J-1: H. Li, Jeffrey Fan, Z. Qi, S. Tan, L. Wu, Y. Cai, X. Hong, “Partitioning-based approach to fast on-chip decap budgeting and minimization”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 25, No. 11, pp 2402-2412, November 2006 (pdf)
   

PEER-REVIEWED Conferences

Year 2008

• C22: W. Zhao, C. Castello, Jeffrey Fan, "Design considerations of SOPC-based H.264/AVC systems", 1st International Workshop on Video Coding and Video Processing (VCVP'08), Session S7-3, Shenzhen, China, November 26-28, 2008. (pdf) (invited)
   

• C21: S. Fan, Jeffrey Fan, K. Makki, N. Pissinou, "Communications via systems-on-chips clustering in large-scaled sensor networks", to appear on IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC'08), Shanghai, China, December 17-20, 2008 (pdf)
   

• C20: C. Castello, Jeffrey Fan, T. Chou, H. Kuo, "Integration and implementation of secured IP based surveillance networks", to appear on IEEE 3rd Asia-Pacific Services Computing Conference (APSCC'08), Yilan, Taiwan, December 9-12, 2008 (pdf)
   

• C19: C. Liu, R. Kalli, Jeffrey Fan, S. Hung, "Volterra series based signal processing on integrated communication systems", IEEE International Conference on Communications and Networking in China (ChinaCom'08), SPC-04, Session 8, Hangzhou, China, August 25-27, 2008. (pdf)
   

• C18: C. Liu, X. Yuan, A. Mullaguru, Jeffrey Fan, "Model order reduction via rational transfer function fitting and eigenmode analysis", International Conference on Modeling, Identification and Control (ICMIC'08), Session 05, No. A2_10, Shanghai, China, June 29-July 2, 2008. (pdf)
   

• C17: W. Zhao, Z. Luo, Jeffrey Fan, S. Tan, "Vector edge detection in H.264 Implementation", IEEE 5th International Conference on Embedded Software and Systems Symposia (ISHSO'08), pp. 208-212, Chengdu, China, July 29-31, 2008. (pdf)
   

• C16: R. Chen, W. Zhao, Q. Liu, Jeffrey Fan, "Efficient H.264 architecture using modular bandwidth estimation", IEEE 5th International Conference on Embedded Software and Systems (ICESS'08), pp. 277-282, Chengdu, China, July 29-31, 2008. (pdf)
   

• C15: T. Chou, S. Fan, W. Zhao, Jeffrey Fan, A. Davari, "Intrusion aware system-on-a-chip design with uncertainty classification", IEEE 5th International Conference on Embedded Software and Systems (ICESS'08), pp. 527-531, Chengdu, China, July 29-31, 2008. (pdf)
   

• C14: C. Liu, R. Chen. J. Tan, S. Fan, Jeffrey Fan, K. Makki, "Thermal aware clock synthesis considering stochastic variation and correlations", IEEE International Symposium on Circuits and Systems (ISCAS'08), pp. 1204-1207, Seattle, WA, May 18-21, 2008 (pdf)
   

• C13: C. Liu, J. Tan, R. Chen, G. Liu, Jeffrey Fan, "Thermal aware clocktree optimization in nanometer VLSI systems considering temperature variations", IEEE 40th Southeastern Symposium on System Theory (SSST'08), pp. 306-310, New Orleans, LA, March 17-18, 2008 (pdf)
   

• C12: C. Liu, R. Chen, H. Huang, Jeffrey Fan, "Parameterized interconnect modeling and simulation in VLSI design considering variations", IEEE 40th Southeastern Symposium on System Theory (SSST'08), pp. 225-229, New Orleans, LA, March 17-18, 2008 (pdf)
   

• C11: T. Ademoye, A Davari, C. Castello, S. Fan, Jeffrey Fan, "Path planning via CPLEX optimization", IEEE 40th Southeastern Symposium on System Theory (SSST'08), pp. 92-96, New Orleans, LA, March 17-18, 2008 (pdf)
   

Year 2007

• C10: R. Chen, Jeffrey Fan, "Complexity reduction for SOPC-based H.264/AVC coder via sum of absolute difference", IEEE/CIE 7th International Conference on ASIC (ASICON’07), pp. 1277-1280, Guilin, China, Oct. 26-29, 2007 (pdf) (invited)

• C9: Jeffrey Fan, N. Mi, S. Tan, “Voltage drop reduction for on-chip power delivery considering leakage current variations”, IEEE 25th International Conference on Computer Design (ICCD'07), Lake Tahoe, CA, pp. 78-83, Oct. 7-10, 2007 (pdf)
   

• C8: X. Yuan, Jeffrey Fan, B. Liu, S. Tan “Stochastic based extended Krylov subspace method for power/ground network analysis”, IEEE/CIE 7th International Conference on ASIC (ASICON’07), pp. 1100-1103, Guilin, China, Oct. 26-29, 2007 (pdf) (invited)
   

• C7: Jeffrey Fan, G. Yu, J. Tan, S. Tan, “Modeling and analysis of biological cells in DRAM implementation”, IEEE International Behavioral Modeling and Simulation Conference (BMAS'07), pp. 90-93, San Jose, CA, Sept. 20-21, 2007 (pdf)
   

• C6: Jeffrey Fan, N. Mi, S. Tan, Y. Cai, X. Hong, “Statistical model order reduction for interconnect circuits considering spatial correlations”, IEEE/ACM 10th Design Automation and Test in Europe Conference (DATE'07), pp. 1508-1513, Nice, France, April 16-20, 2007. (pdf)

• C5: N. Mi, B. Yan, S. Tan, Jeffrey Fan, H. Yu, “General block structure preserving reduced order modeling of linear dynamic circuits”, Proc. 8th International Symposium on Quality Electronic Design (ISQED’07), pp. 633-638, San Jose, CA, March 26-28, 2007 (pdf)

Year 2006

• C4: N. Mi, Jeffrey Fan, S. Tan, “Statistical analysis of power grid networks considering lognormal leakage current variations with spatial correlation”, IEEE 24th International Conference on Computer Design (ICCD'06), pp. 56-62, San Jose, CA, Oct. 1-4, 2006. (pdf)
   

• C3: N. Mi, Jeffrey Fan, S. Tan, “Simulation of power grid networks considering wires and lognormal leakage current variations”, IEEE International Behavioral Modeling and Simulation Conference (BMAS'06), pp. 73-78, San Jose, CA, Sept. 14-15, 2006. (pdf)
   

• C2: Jeffrey Fan, N. Mi, S. Tan, “Variational compact modeling and simulation for linear dynamic systems”, IEEE International Behavioral Modeling and Simulation Conference (BMAS'06), pp. 17-22, San Jose, CA, Sept. 14-15, 2006. (pdf)

• C1: Jeffrey Fan, I. Liao, S. Tan, Y. Cai, X. Hong, “Localized on-chip power delivery network optimization via sequence of linear programming”, Proc. 7th International Symposium on Quality Electronic Design (ISQED’06), pp. 272-277, San Jose, CA, March 27-29, 2006. (pdf)
   

THESIS AND DISSERTATION

• T3: Arjun Mullaguru, “Model order reduction using eigenmode analysis and rational transfer function fitting", M.S. thesis, Department of Electrical and Computer Engineering, Florida International University, July 2008 (pdf)
   

• T2: Ramakoti Kalli, “Nonlinear modeling of radio frequency circuits to estimate third-order nonlinear distortions", M.S. thesis, Department of Electrical and Computer Engineering, Florida International University, July 2008 (pdf)
   

• T1: Jeffrey Fan, “Process variation-aware interconnect simulation and optimization in VLSI design”, Ph.D. dissertation, Department of Electrical Engineering, University of California, Riverside, June 2007. (pdf)