Fall 2009

    EEE-4343 (Introduction to Digital Electronics)

• Syllabus

• Lecture notes 

  • Note-1
  • Note-2
  • Note-3
  • Note-4
  • Note-5
  • Note-6
  • Note-7
  • Note-8
     

• Homework and exams

  • HW #1: Chapter 4 (10 questions), 4, 33, 37, 44, 51, 75, 78, 86, 91, 105
  • HW #1 solutions
     
  • Midterm-I exam
  • Midterm-I solutions
     
  • HW #2: Chapter 10 (10 questions), 2, 5, 10, 14, 22, 25, 27, 46, 51, 61
  • HW #2 solutions
     
  • Midterm-II exam
  • Midterm-II solutions
     
  • HW #3: Chapter 11 (8 questions), 6, 8, 16, 20, 22, 27, 29, 34
  • HW #3 solutions
     
  • Final exam
     

• Available research papers
   
  • Copyrights reserved by IEEE 9th International Conference on Solid-State and Integrated Circuit Technology, 2008

    1	Low-Voltage Limitations and Challenges of Memory-Rich Nano-Scale CMOS LSIs
    2	An Atomic-scale Nanoelectronic In – vivo Sensing System: Fundamental Limits
    3	Low Power Constant Multiplier with Variable Precision Computing Capability
    4	A Reconfigurable Power Efficient Correlator for Channel Estimation in DTMB System
    5	A Novel Low-Power Digital Baseband Circuit for UHF RFID Tag with Sensors
    6	A Method to Lower Power in Speed Negotiation Algorithm of Fiber Channel
    7	Non-Volatile Register based on hybrid Spintronics/CMOS technology
    9	A Flexible Approach to Generating Customized Elliptic Curve Cryptographic Coprocessors over GF(2m)
    10	A Programmable Security Processor for Cryptography Algorithms
    11	A Novel H.264 QP Adaptive MPDC Block-Matching Algorithm and Its VLSI Design
    12	Design and Implementation of Two Key Image processing Techniques for CMOS Image Sensor Based on FPGA
    13	Study and AISC Design of a High Efficiency OLED Scan Controller
    14	Low-Power Carry Look-Ahead Adder With Multi-Threshold Voltage CMOS Technology
    15	Gate-Level Dual-Threshold Total Power Optimization Methodology (GDTPOM) Principle for Designing High-Speed Low-Power SOC Applications
    16	A High-speed Low-power Pulse-swallow Divider with Robustness Consideration
    17	Low Power and High Performance Zipper Domino Circuits with Charge Recycle Path
    18	A Low Power Convolver for Channel Estimation in Chinese DTMB System
    19	Low power circuits for NoC-Based SoC Design
    20	Low Power Design and Implementation for a SoC
    21	Heterogeneous Multi-Core SOC Architecture for MPEG Decoding
    22	Memory-efficient Architecture Including DWT and EC for JPEG2000
    23	A new motion estimation algorithms based on Zero Detection and vector filter in Video Format Conversion Chip
    24	Efficient FPGA Implementation of Modified DWT for JPEG2000
    25	High-Speed, Pipelined Implementation of Squashing Functions in Neural Networks
    26	An Acquisition Circuit in Global Positioning System Receivers
    27	Novel frequency synchronization for TDS-OFDM systems
    28	The Implementation methods of High Speed FIR Filter on FPGA
    29	Differential Power Analysis and Differential Fault Attack Resistant AES Algorithm and its VLSI Implementation
    30	Research and Implementation of High-speed Reconfigurable Grain algorithm

    
     

• Final presentation schedule: Student name (paper number)

  • 11/18: Magnolia (10), William (24), Edemio (21), Orlando (16)
  • 11/23: Gabriel (13), Ivan (20), Adolfo (5), Marvin (7)
  • 11/25: Anna (26), Sandy (14), Luciano (28), Freddy (23)
  • 11/30: Edi (12), Wai (1), Maria (22), Sam (2)
  • 12/2: Christopher (19), Diego (27), Kenneth (17), Available
     

• Announcements (Check frequently for class news)

• Homework #1 posted, 10 questions, due at the beginning of the class on 9/21/09 (Mon). (9/12/09)
• Midterm-I is scheduled on 9/23/09 (Wed). (9/12/09)
• HW #1 solutions posted. (9/21/09)
• Midterm-I solution posted. (9/29/09)
• Homework #2 posted, 10 questions. (10/6/09)
• Homework #2 due on 10/21. Midterm-2 is scheduled on 10/26 (Mon). (10/9/09)
• HW #2 solutions posted. (10/22/09)
• The final exam is scheduled on Nov 16 (Mon). (10/22/09)
• The papers for final presentation are posted. Please email the instructor the selection and date to present no later than 11/4. Each student needs to pick one paper, so first comes first serves, and no duplication of papers. (10/26/09)
• Homework #3 posted, 8 questions, due at the beginning of the class on 11/9 (Mon). (10/26/09)
• Midterm-II solutions posted. (11/1/09)
• HW #3 solutions posted. (11/9/09)