Welcome to THE VLSI Lab
- A Fabless IC Design House
(Very Large Scale Integration
Circuit LAB)
Dr. Jeffrey Fan, Assistant Professor
Department of Electrical and Computer
Engineering
VLSI Lab, Engineering Center, EC-3930
Florida International
University
10555 W. Flagler Street
Miami, Florida 33174, USA
Office: 1-305-348-3017, Lab: 1-305-348-1708
E-mail: jeffrey (dot) fan (at) fiu (dot) edu
The VLSI Lab is equipped with licensed Electronic Design Automation
(EDA) tools from Mentor Graphics Corporation. The lab is classified
under Elite institutions in terms of the Mentor Graphics Higher
Education Program. The available licenses are for both Windows and
Linux environments in partnership with MOSIS Integrated and Circuit
Fabrication Service.
There are currently 20 license seats available with two servers running on Linux and two servers running on Windows. The software package from Mentor Graphics Corporation contains a wide range of tools for every level of production: design, verification and testing. A complete list of tools is at the Lab's disposal and their usages are listed as follows:
IC Nanometer Design
The IC Nanometer Design package provides a complete environment for the design, capture, layout and verification of analog, digital and mixed-signal integrated circuits, including schematic capture, physical layout, floor planning, interconnect routing, simulator, verification, and extraction.
With the help of this package, a student can start with a concept on paper and then by using the built-in models and technology libraries, he/she can gradually develop the design. At every step, design rules are verified to keep the design in accordance with the foundry rules. Latest libraries associated with this package allow students to create real projects at deep submicron technology which helps them to understand the intricacies associated with contemporary design tasks. As the final step, a student generates a GDS-II file which is used by the fabrication partner (MOSIS Integrated and Circuit Fabrication Service) to turn our design into actual chip prototypes. We can then use the prototypes to do physical testing in our lab. Current fabrication processes include TSMC, IBM, Austrian Micro, and ON Semiconductor, ranging from 40 nm to 0.35µm technologies.
Verification and Test
With this package, it is possible for students in the lab to write models of their projects in Hardware Description Languages (HDL) in Verilog or VHDL which are then converted into an optimum design based on the power and timing constraints. Students can create and verify the designs in software, which provides the ability to simulate the designs for a wide range of operating conditions, finding flaws and fixing them to create a better end product.
This software package combined with the Field Programmable Gate Arrays (FPGA) lab facilities provides a great learning experience to the students. A student can program the design onto an FPGA platform and then use it for the project. FPGA can be reprogrammed later to accommodate a completely different design which promotes resource reusability. The lab is equipped with more than 100 FPGA-related packages, including Xilinx CPLD (CoolRunner), Spartan 3E/6E, and Virtex 5 plus ISE design suite.
Moreover, the lab is equipped with tools to design Printed Circuit Boards (PCB). These high end tools provide students with the ability to analyze and create signal integrity and power aware designs along with the chip prototyping. Mentor Graphics has granted the lab with the following PCB software:
PCB PADS: PADS is a complete PCB design solution combining schematic definition with layout & simulation tools. It provides an integrated design environment combining ease of use with functional depth.
PCB Expedition: This tightly integrated solution composes the industry’s most advanced design and analysis functionality.
PCB Board Station: Important tools in this package are: Hyperlynx, I/O designer and expedition pinnacle.
